Description: Sr Verification Engineer VCS Distributed Simulation & Multi-Chip Verification Looking for a Senior Verification Engineer with ... expertise in VCS distributed simulation and multi-chip verification. You ...
19 days ago
... Description: Design Verification Engineer - CPU Subsystem Looking for a Design Verification Engineer to play ... UVM, with a focus on developing verification environments, executing test plans, & ... , UVC development, & verification of complex protocols like ...
a day ago
... Description: Design Verification Engineer - CPU Subsystem Looking for a Design Verification Engineer to play ... UVM, with a focus on developing verification environments, executing test plans, & ... , UVC development, & verification of complex protocols like ...
23 days ago
Description: Design Verification CPU Core & Block Looking for a ... feature/test plan verification engineer responsible for ISA & microarchitectural verification. This will be ... Santa Clara, CA. Scope: Functional verification with emphasis on core level ...
23 days ago
Description: RTL Design Engineer Looking for a solid RTL Design Engineer who has a strong ... understanding of verification flows. This person should be a strong engineer and be ...
7 days ago