Description: 3+ years of FPGA verification experience Strong SystemVerilog programming skills Hands-on experience with UVM (Universal Verification Methodology) Familiarity with industry-standard verification tools (e.g., QuestaSim, Synopsys VCS) ...
24 days ago
Description: Company Description Our Mission At Palo Alto Networks everything starts and ends with our mission: Being the cybersecurity partner of choice, protecting our digital way of life. Our vision is a world where each day is safer and more secure ...
27 days ago
Description: Company Description Our Mission At Palo Alto Networks everything starts and ends with our mission: Being the cybersecurity partner of choice, protecting our digital way of life. Our vision is a world where each day is safer and more secure ...
27 days ago
Description: Job Discription: 3+ years of FPGA verification experience Strong SystemVerilog programming skills Hands-on experience with UVM (Universal Verification Methodology) Familiarity with industry-standard verification tools (e.g., QuestaSim, ...
29 days ago
... FPGA RTL design and Board validation Location: Santa Clara, CA (Onsite ... are seeking a highly skilled Senior FPGA Design Engineer with 7 to 15 years ... design and development, and FPGA validation and testing. The ideal candidate ...
18 days ago
Description: Title:- Board Level Test Engineer Location:- Santa Clara, CA Key ... and scripts for early hardware validation and fault isolation. Identify and ...
9 days ago