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Board level test technician
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Jobs and careers for board level test technician in Santa Clara
(1 jobs)
Design verification engineer with uvm,ovm, systemverilog & python
Last month
Company
PDDN Inc
(
+1
)
Schedule
Full-day
(
+1
)
Employment
Temporary
(
+1
)
Source
dice.com
(
+1
)
Location
Santa Clara
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+1
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Design Verification Engineer with UVM,OVM, SystemVerilog & Python
PDDN Inc
Santa Clara
... analog mixed-signal interfaces. Develop
test
plans and coverage metrics from ... and writing block and chip-
level tests
. Creat
28 days ago
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