... are looking for Technical Architect (Power BI, OBIEE, Paginated Reports, Fabric)/Santa ... resume at Title: Technical Architect (Power BI, OBIEE, Paginated Reports, Fabric)/Santa ...
22 days ago
... of business intelligence solutions using Power BI, Paginated Reports, Oracle Business Intelligence ...
21 days ago
Description: Hello, Greetings from Abhyanth Solutions ! Hope you are doing well! This is Sonu from Abhyanth Solutions. I have an urgent requirements with one of my clients. Please go through the Job Description and let me know your are you interested. ...
6 hours ago
Description: NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep ...
17 days ago
Description: Today, NVIDIA is tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what's never been ...
19 days ago
Description: new data engineer position in US. Below is ... , and reliabilityDevelop interactive and insightful Power BI dashboards and reports to visualize ...
17 days ago
... , to architect microarchitectures that optimize power, performance, and area (PPA). We ...
15 days ago
... understand tools used by ASIC engineers like Lint, CDC, STA, etc ... meet functional, timing, area, and power requirements. Collaborate with architecture and ...
4 hours ago
Description: Title: ASIC/RTL Design Engineer - Onsite Description: KEY RESPONSIBILITIES: Write ... meet functional, timing, area, and power requirements. Collaborate with architecture and ...
9 hours ago
Description: Role: Analog Layout Design Engineer Location: Santa Clara, CA Emp ... layout IC for ultra-low power applications using advanced CMOS FinFET ...
8 days ago
Description: Title: RTL Engineer Location: Santa Clara, CA (Day-1 ... third-party IP, ensuring performance, power,
10 days ago
... Senior SoC/ASIC Physical Design Engineer to lead and drive the ... methodologies that optimize design performance, power efficiency, and area (PPA). Your ...
15 days ago
Description: Position: Firmware Validation Engineer Location: USA Exp: 8+ Key Skills: C, C++ ... protocols Optimizing firmware for performance, power efficiency, and stability. Develop and ...
23 days ago
... Title: Senior Deep Learning Engineer/AI-ML Engineer Location: Santa Clara, California ... hardware to vastly enhance the power efficiency of model deployment at ...
29 days ago
... amazing creativity and discovery, and powers what were once science fiction ...
20 days ago
Description: Intelligent machines powered by Artificial Intelligence computers that ...
20 days ago
Description: Intelligent machines powered by Artificial Intelligence computers that ...
21 days ago
... amazing creativity and discovery, and powers what were once science fiction ...
21 days ago
... amazing creativity and discovery, and powers what were once science fiction ...
24 days ago
... , the next-generation gaming service powered by Nvidia GPUs in the ...
25 days ago
- 1
- 2