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Senior fpga engineer
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Jobs and careers for senior fpga engineer in Santa Clara
(1 jobs)
Lead fpga verification engineer with uvm /verilog system-active requirement
Last week
Company
Data Capital Inc
(
+1
)
Schedule
Full-day
(
+1
)
Employment
Full-time
(
+1
)
Source
dice.com
(
+1
)
Location
Santa Clara
(
+1
)
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Lead
FPGA
Verification
Engineer
with UVM /Verilog System-Active Requirement
Data Capital Inc
Santa Clara
Description: Mandate Skills:
FPGA
Verification Exp Strong SystemVerilog coding ( ... Verification Methodology)-UVM 5+ years of
FPGA
verification experience Strong SystemVerilog programming ...
5 days ago
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