... products. Responsibilities: .Develop and maintain test benches using UVM/SystemVerilog. .Write ... and debug test cases for functional and performance ... design issues in collaboration with engineering teams. .Participate in design ...
2 days ago
... products. Responsibilities: Develop and maintain test benches using UVM/SystemVerilog.Write ... and debug test cases for functional and performance ... design issues in collaboration with engineering teams.Participate in design reviews ...
6 days ago