Description: Role: Analog Layout Design Engineer Location: Santa Clara, CA ... years of experience in Analog and RF layout. Experience developing and ... leading complex layout IC for high-speed ... and knowledge of complex layout IC for ultra-low ...
2 days ago
... skilled Senior SoC/ASIC Physical Design Engineer to lead and drive the ... physical design activities to successful closure by ... flows and methodologies that optimize design performance, power efficiency, and area ...
9 days ago
Description: Role: PCB Design EngineerLocation: Santa Clara, CA ( Day 1 ... subcon Job Description: Senior Electrical Engineer - Advanced Semiconductor Packaging and Integration ... looking for a highly skilled Senior Engineer to contribute to our cutting ...
10 days ago
... Title: Senior Deep Learning Engineer/AI-ML Engineer Location: Santa Clara, California ... We are team of chip design, analog and AI domain experts working ...
23 days ago
Description: Senior/Principal Test Engineer for a Well Funded Publicly Traded ... a Senior or Principal MEMs Test Engineer to collaborate with our Engineering ...
7 hours ago
Description: Senior/Principal Test Engineer for a Well Funded Publicly Traded ... a Senior or Principal MEMs Test Engineer to collaborate with our Engineering ...
4 days ago
... : Hiring a Sr/Principal ATE Test Engineer for Publicly Traded Global Semiconductor ... for a skilled ATE Test Development Engineer join our team in defining ...
4 days ago
... : Hiring a Sr/Principal ATE Test Engineer for Publicly Traded Global Semiconductor ... for a skilled ATE Test Development Engineer join our team in defining ...
8 days ago
Description: Senior/Principal Test Engineer for a Well Funded Publicly Traded ... a Senior or Principal MEMs Test Engineer to collaborate with our Engineering ...
8 days ago
Description: Hardware Engineer Santa Clara, CA ( Onsite) Full ... of experience in Hardware Systems Design/Testing/Bring-up with MTech ... debug, someone with hardware bgv, design, being in the lab working ... open up board file, board design. PCIE gen 5, server exp is ...
2 days ago
... name: Teamcenter Product (PLM) Engineer Location: TCS Sunnyvale & Santa Clara ... environment, Gap Analysis, Solution Design. Reviewing individual projects functional ... specifications, Develop technical design specifications (TDD). Review each ...
4 days ago
Description: Job Title: Design Verification Engineer (DV) Company: Sivaltech Location: Santa ... 're seeking an experienced Design Verification Engineer to join our team in ... , CA. Job Description: As a Design Verification Engineer, you'll develop and execute ...
a month ago
... Frontend Synthesis/STA Engineer Job Summary We are ... analysis. Key Responsibilities 1. Design and implement digital circuits ... and optimization of digital designs. 3. Conduct static timing ... analysis (STA) to ensure design meets timing requirements. 4. ...
a month ago
... immediately hiring for a Failure Analysis Engineer (Board Level) Position type: Full ... , Python, Electrical Engineering) Failure analysis Engineer(PCB, Python, PCB Board testing ... 5 Years of experience on Hardware design/Testing/System design/Testing mainl
11 days ago
... creative and highly motivated engineer with expertise in systems ... Software team. You will design key aspects of our ... you'll be doing: Design, develop and verify features ... architecture; collaborating with hardware engineers and fellow software engineersHelp ...
18 days ago
Description: Job Title: RTL Engineer: Integrate RISC-V Core to ... 5+ years of experience in RTL design, SoC integration, or related ... Verilator).Deep understanding of SoC design, integration, and high-performance ... to debug and optimize designs for functiona
23 days ago
... Software Engineer for the OCI Load balancing service, you will design and ... and our customers. You will design, develop, troubleshoot and debug software ...
28 days ago
... seeking an IC Application Test Engineer for a global Semiconductor client to ... plans using Advantest 93k tester, design engineering and RF testing experience ... . Primary Duties & Responsibilities Design and debug the required device ...
29 days ago
Description: iitjobs is seeking a Jira Engineer who is responsible for configuring, ... with related Atlassian tools. Jira Engineer Onsite-Santa Clara, CA (5-day ... to work with teams to design and implement solutions, automate processes ...
2 days ago
Description: Title: RTL Engineer Location: Santa Clara, CA (Day-1 ... RISC-V CPU cores into SoC designs, collaborating with cross-functional teams ... (DV, physical design, architecture, verification, and post-silicon ...
4 days ago