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Jobs and careers temporary for associate test engineer in Santa Clara (2 jobs)

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DFT Engineer

  • PDDN Inc
  • Santa Clara
Description: Role: DFT Engineer Location: Santa Clara, CA Interview: ... -on experience with DFT and test flow with commercial EDA tools ... DFT techniques include JTAG, ATPG, test pattern translation, yield learning, logic ...
25 days ago

Design Verification Engineer with UVM,OVM, SystemVerilog & Python

  • PDDN Inc
  • Santa Clara
Description: Role: Design Verification Engineer Location: Santa Clara, CA Interview: ... analog mixed-signal interfaces. Develop test plans and coverage metrics from ... writing block and chip-level tests. Creat
5 days ago

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