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Jobs and careers for engineer iv in Santa Clara (17 jobs)

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  • American IT Systems
  • Santa Clara
Description: FPGA Verification Engineer-Santa Clara, CA- 5days onsite ... Must Have Skills FPGA Verification Engineer Skill 1 8 + Years of in FPGA ... motivated and skilled FPGA Verification Engineer to join our dynamic team ...
4 days ago
  • American IT Systems
  • Santa Clara
Description: Role : FPGA Verification Engineer Location Santa Clara, CA Onsite ... Must Have Skills FPGA Verification Engineer Skill 1 8 + Years of in FPGA ... motivated and skilled FPGA Verification Engineer to join our dynamic team ...
5 days ago
  • American IT Systems
  • Santa Clara
Description: FPGA Verification Engineer Day1 Onsite (Santa Clara, CA) ... motivated and skilled FPGA Verification Engineer to join our dynamic team ... will work closely with design engineers to develop and execute verification ...
5 days ago
  • Spiceorb
  • Santa Clara
Description: FPGA Verification Engineer Santa Clara, CA Must Have ... motivated and skilled FPGA Verification Engineer to join our dynamic team ... will work closely with design engineers to develop and execute verification ...
5 days ago
  • American IT Systems
  • Santa Clara
Description: Role: FPGA Verification Engineer Location: Santa Clara, CA- Onsite ... Must Have Skills FPGA Verification Engineer Skill 1 8 + Years of in FPGA ... motivated and skilled FPGA Verification Engineer to join our dynamic team ...
11 days ago
  • Cloudious
  • Santa Clara
Description: FPGA Verification Engineer Santa Clara, CA Mandatory Areas ... Must Have Skills FPGA Verification Engineer Skill 1 8 + Years of in FPGA ... motivated and skilled FPGA Verification Engineer to join our dynamic team ...
26 days ago
  • UNICOM TECHNOLOGIES INC
  • Santa Clara
Description: Role: FPGA Verification Engineer Location Santa Clara, CA Onsite ... Must Have Skills FPGA Verification Engineer Skill 1 8 + Years of in FPGA ... motivated and skilled FPGA Verification Engineer to join our dynamic team ...
a month ago
  • Tanisha Systems, Inc.
  • Santa Clara
... motivated and skilled FPGA Verification Engineer to join our dynamic team ... will work closely with design engineers to develop and execute verification ...
3 days ago
  • Cardinal Integrated Technologies Inc
  • Santa Clara
Description: Role: FPGA Verification Engineer (19921-1) Location: Santa Clara, CA - ... motivated and skilled FPGA Verification Engineer to join our dynamic team ...
4 days ago
  • Xyant Services, Inc.
  • Santa Clara
... motivated and skilled FPGA Verification Engineer to join our dynamic team ... will work closely with design engineers to develop and execute verification ...
11 days ago
  • Data Capital Inc
  • Santa Clara
... for an experienced FPGA Verification Engineer to verify complex FPGA designs ...
19 days ago
  • 3S Business Corporation Inc.
  • Santa Clara
... motivated and skilled FPGA Verification Engineer to join our dynamic team ... will work closely with design engineers to develop and execute verification ...
30 days ago
  • Data Capital Inc
  • Santa Clara
Description: 3+ years of FPGA verification experience Strong SystemVerilog programming skills Hands-on experience with UVM (Universal Verification Methodology) Familiarity with industry-standard verification tools (e.g., QuestaSim, Synopsys VCS) ...
2 hours ago
  • Data Capital Inc
  • Santa Clara
Description: 3+ years of FPGA verification experience Strong SystemVerilog programming skills Hands-on experience with UVM (Universal Verification Methodology) Familiarity with industry-standard verification tools (e.g., QuestaSim, Synopsys VCS) ...
2 days ago
  • Data Capital Inc
  • Santa Clara
Description: 3+ years of FPGA verification experience Strong SystemVerilog programming skills Hands-on experience with UVM (Universal Verification Methodology) Familiarity with industry-standard verification tools (e.g., QuestaSim, Synopsys VCS) ...
4 days ago
  • Data Capital Inc
  • Santa Clara
Description: Mandate Skills: FPGA ,System verilog coding,UVM 3+ years of FPGA verification experience Strong SystemVerilog programming skills Hands-on experience with UVM (Universal Verification Methodology) Familiarity with industry-standard verification ...
4 days ago
  • Data Capital Inc
  • Santa Clara
Description: Responsibilities: Develop and maintain test benches using UVM/SystemVerilog.Write and debug test cases for functional and performance validation.Identify and resolve design issues in collaboration with engineering teams.Participate in design ...
18 days ago