Description: Job Title : FPGA Verification Engineer Santa Clara, CA- 5 days onsite ... a highly motivated and skilled FPGA Verification Engineer to join our dynamic team ... closely with design engineers to develop and execute verification plans, identify and ...
8 days ago
Description: Hi, Role: Firmware Validation Engineer (System Level) Location: Santa Clara, ... + Must Have Skills Firmware Validation Engineer Skill 1 10 + Years of exp ... high-speed interfaces such as PCIe, UART, and UMA.
2 days ago
Description: Signal Integrity Engineer- Power Integrity experience is a plus. ... with SERDES interfaces such as PCIe, PAM4, USB. Experience with Characterization ...
10 days ago
Description: Title: RTL Design Engineer - Onsite Mandatory skills: FPGA, design, ... , data, control path, implementing interfaces, PCIe, Gen 6, Gen 7, CXL, UAL, Ethernet ...
18 days ago
Description: Job Title: DFT Engineer (6+ Years) Location: Santa Clara, California, ... a highly skilled and motivated DFT Engineer with 6+ years of experience to ... will work closely with design, verification, and product engineering teams to ...
8 days ago
... Design Engineer Location: Santa Clara, CA Candidates with designing plus testing verification ...
9 days ago
Description: Role: Sr. Analog Design Engineer Location: Santa Clara, CA (Fully ... generate test code for silicon verification & characterization.Good understanding of IC ...
24 days ago
Description: Overview Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft's expanding Cloud Infrastructure and responsible for powering Microsoft's "Intelligent Cloud" mission. SCHIE delivers the core ...
10 days ago