Description: Job Title FPGA RTL design and Board validation Location: Santa ... FPGA Design Engineer with 7 to 15 years of experience in RTL design, IP design and ... will have a strong background in design debugging and a deep familiarity with ...
27 days ago
Description: Job Title FPGA RTL design and Board validation Location: Santa ... FPGA Design Engineer with 7 to 15 years of experience in RTL design, IP design and ... will have a strong background in design debugging and a deep familiarity with ...
28 days ago
Description: Job Title FPGA RTL design and Board validation Location: Santa ... FPGA Design Engineer with 7 to 15 years of experience in RTL design, IP design and ... will have a strong background in design debugging and a deep familiarity with ...
29 days ago
Description: Position : Generative AI (GenAI) Design Engineer (Contract) Location : Santa Clara, CA ... are seeking a Generative AI (GenAI) Design Engineer to join our team and ... such as content creation, product design, and intelligent automation. Develop ...
4 days ago
... DL Copy Advanced IC Package Design Engineer (CoWoS / 2.5D Packaging)Marvell Santa ...
a day ago
... PythonProficient in using industry-standard design software, including Cadence Virtuoso, ... Calibre DRC, LVS toolsExperience supporting design teams working with analog and ... digital design flowsExcellent communication skills and ability ...
22 days ago
Description: Job Title: FPGA Design Verification Engineer/Technical Lead II - VLSI Location: ... Strong understanding of FPGA, ASIC, RTL design principles, and architectures. Proficiency in ... etc. Knowledge of high-speed I/O design and protocols (PCIe, I2C, SPI ...
28 days ago
... Client Job Title: FPGA Design Verification Engineer Job Title: Technical Lead ... skilled FPGA Verification Engineer to join our ... verification of complex FPGA designs, ensuring their functionality, ... will work closely with design engineers to develop and execute ...
5 days ago
Description: Role: GenDesign / Inverse Design Ai Engineer Location: Santa Clara, CA We ... are seeking a Generative AI (GenAI) Design Engineer to join our team and ... such as content creation, product design, and intelligent automation.Develop forward ...
8 days ago
... looking for a AI Engineer for our client in Santa ... CA Job Title: AI Engineer Job Location: Santa Clara ... - $65hrThe Generative AI Design Engineer will design, develop, and optimize generative ... as content creation, product design, intelligent automation, and ...
14 days ago
Description: Role: GenDesign / Inverse Design Ai Engineer Location: Santa Clara, CA Must ... are seeking a Generative AI (GenAI) Design Engineer to join our team and ...
14 days ago
Description: Title: GenDesign / Inverse Design Ai Engineer Location: Santa Clara, CA-Onsite ... are seeking a Generative AI (GenAI) Design Engineer to join our team and ... such as content creation, product design, and intelligent automation. Develop forward ...
17 days ago
... are seeking a Generative AI (GenAI) Design Engineer to join our team and ... such as content creation, product design, and intelligent automation.Develop forward ...
17 days ago
... motivated and skilled FPGA Verification Engineer to join our dynamic team ... the verification of complex FPGA designs, ensuring their functionality, performance, and ... . You will work closely with design engineers to develop and execute verification ...
25 days ago
Description: FPGA Verification Engineer Day1 Onsite (Santa ... and skilled FPGA Verification Engineer to join our dynamic ... verification of complex FPGA designs, ensuring their functionality, ... will work closely with design engineers to develop and execute ...
27 days ago
... Description: FPGA Verification Engineer Santa Clara, CA ... and skilled FPGA Verification Engineer to join our dynamic ... verification of complex FPGA designs, ensuring their functionality, performance ... will work closely with design engineers to develop and execute ...
27 days ago
... Description: Role summary Seeking a Senior Design Verification Engineer with 8+ years of experience in ... using SystemVerilog and UVM. The engineer will own verification of complex ... closure, and collaborate closely with RTL, architecture, and validation teams to ...
12 days ago
Description: Silicon Design Package Engineer Location Santa Clara, CA (Onsite ... highly specialized in semiconductor packaging design, requiring strong EDA tool ... Expertise: Multi-layer package design experience. Understanding of substrate manufacturing ...
3 days ago
Description: Silicon Design Package Engineer Location Santa Clara, CA (Onsite ... highly specialized in semiconductor packaging design, requiring strong EDA tool ... Expertise: Multi-layer package design experience. Understanding of substrate manufacturing ...
5 days ago
... seeking a highly skilled Hardware Design & FPGA Engineer to join our client's advanced ... in FPGA development, hardware board design, and hands-on experience working ... -edge product development. Key Responsibilities Design, implement, and validate FPGA
3 days ago