Description: Pre-Silicon Verification Engineer Contract @ CA & TX - Onsite Job ... in Verilog, System Verilog, C/C++ based verification, and UVM methodologyExperience i
23 hours ago
Description: Title: Infra Silicon Physical Design Engineer Location: Bay Area, CA/Austin, ... experience performing timing and physical verification closure on 5nm FinFET TSMC ...
2 days ago
Description: Title: Post Silicon Engineer Location: Sunnyvale, CA Type: ... CPU s/DSP) in Pre-Silicon (Virtual, Emulation and fpga ... platforms) & Post-Silicon ( Bringup boards, non-form-factor ... features in pre/post silicon setups Run tests for ...
4 days ago
Description: Title: Post Silicon Engineer Location: Sunnyvale CA- Onsite Position ... ARM CPU's/DSP) in Pre-Silicon (Virtual, Emulation and fpga platforms ...
3 days ago
... will be similar to Post Silicon Engineer. Candidate Roles and Minimum Qualifications ...
6 days ago
Description: ASIC Engineer (Design Verification) Bay Area, CA ... implement IP/SoC verification plans, build verification test benches to ... sub-system/SoC level verification. Develop functional tests ... based on verification test plan. Drive Design Verification to ...
2 days ago