Description: Design Verification Engineer: Location: Sunnyvale, CA Onsite role. ...
26 days ago
Description: Title: Post Silicon Engineer Location: Sunnyvale, CA Type: ... CPU s/DSP) in Pre-Silicon (Virtual, Emulation and fpga ... platforms) & Post-Silicon ( Bringup boards, non-form-factor ... features in pre/post silicon setups Run tests for ...
a day ago
Description: Title: Infra Silicon Physical Design Engineer Location: Bay Area, CA/Austin, ... experience performing timing and physical verification closure on 5nm FinFET TSMC ...
10 hours ago
Description: Title: Post Silicon Engineer Location: Sunnyvale CA- Onsite Position ... ARM CPU's/DSP) in Pre-Silicon (Virtual, Emulation and fpga platforms ...
11 hours ago
... will be similar to Post Silicon Engineer. Candidate Roles and Minimum Qualifications ...
4 days ago
Description: Role: Physical Design Engineer Location: Sunnyvale CA Type: preferred ... for a highly skilled Physical Design Engineer to work at block level ... -performance ASICs, SoCs, and custom silicon chips with strong scripting skills ...
20 days ago
... looking for a Physical Design Engineer for Full-time project in ... further. Job Role: Physical Design Engineer Location: Sunnyvale CA (Hybrid) ... a highly skilled Physical Design Engineer to work at block level ... ASICs, SoCs, and custom silicon chips with strong sc
20 days ago
Description: ASIC Engineer (Design Verification) Bay Area, CA ... implement IP/SoC verification plans, build verification test benches to ... sub-system/SoC level verification. Develop functional tests ... based on verification test plan. Drive Design Verification to ...
10 hours ago
... : Position : STA (Static Timing Analysis) Engineer Location: Sunnyvale CA or Redmond ... role Static Timing Analysis (STA) Engineer (NO 15+ YEARS RESUME) Job ... Analysis (STA) Engineer to contribute to the timing verification and closure of ...
14 days ago