Description:
DFX RTL Design Engineer - Specialized (US) Santa Clara, CA - 95054 6 Months candidate must be able to come onsite to San Jose, CA 3 days per week OB DUTIES: This is a position for senior level RTL design engineer. As a part of the design team, candidate will be exposed to several IPs including Gbit SERDES, UCIe, PCIe I/F & high frequency design. Successful candidates will be participating in the DFX RTL coding/integration of leading edge I/O SoC in 3 nm processes. This DFX RTL Design Engineer
Jun 10, 2025;
from:
dice.com