Description:
Location: San Jose, CA (5 days onsite) Experience: 8+ years (Relevant) Visa : H1, EAD. Relocation is fine Must Have Keywords: HAPS FPGA Prototyping Emulation Design What candidate will Be Doing: Map multi-million gate SoC designs onto prototyping platforms, creating design partitions, FPGA builds, and testbenches to simulate FPGA components. Establish prototyping systems in the lab and contribute to defining, evolving, and supporting our prototyping methodology. Option to engage in block-le
Jun 24, 2025;
from:
dice.com