Description:
Role: System IP Design Verification Engineer Location: Austin, TX, San Jose, CA (Onsite) Full time hire or W2 Contract Note from manager: 5 yrs experience with GLS verification. Minimum requirements: PhD/MS/BS in Electrical or Computer Engineering 12+ years industry experience in a design verification role Expert hands-on coding skills in Testbench, Stimulus, checkers development, coverage closure. Experience with System Verilog, UVM or equivalent Knowledge of ARM protocols or equivalent protoc
Jul 7, 2025;
from:
dice.com