Where

Hardware Design Engineer 4

Apex Systems
Mountain View Full-day Full-time

Description:

Job#: 2086612 Job Description: Candidate Location Requirements: Silicon Valley, CA - Onsite 3 Days a Week Pay Rate: $79.00 - $82.00 / hour Role Overview We are seeking a highly skilled and motivated engineer with deep expertise in RTL-to-GDSII flows, specifically using Synopsys Fusion Compiler and RTL Architect (RTLA). This role is pivotal in driving synthesis quality, power-performance-area (PPA) optimization, and methodology development for advanced node SoC designs. Key Responsibilities
Aug 26, 2025;   from: dice.com

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