Senior SoC RTL Design Engineer

Description:

We are seeking a Senior SoC RTL Design Engineer to lead the SoC chip-top RTL design and integration, ensuring smooth and efficient integration of all subsystems, IPs, and hard macros into a complete SoC design. The engineer will be responsible for RTL implementation, synthesis constraints, I/O padring design, power/thermal analysis, and physical design collaboration, helping to drive timing closure and system-level optimizations. This role requires deep expertise in SoC architecture, RTL design,