Description:
Role: FPGA Verification Engineer Location: Santa Clara, CA (Fully onsite) Duration: 12+ Months Must have: FPGAExp in UVMExp in System Verlilog Job Description: We are seeking a highly motivated and skilled FPGA Verification Engineer to join our dynamic team. In this role, you will be responsible for the verification of complex FPGA designs, ensuring their functionality, performance, and reliability. You will work closely with design engineers to develop and execute verification plans, identify
Oct 15, 2025;
from:
dice.com