Description:
Duration: 3 Months, extension possible based on needs and performance Job Title: FPGA Verification Engineer Job Summary: Must Have Skills FPGA UVM System Verlilog The Opportunity: We are seeking a highly motivated and skilled FPGA Verification Engineer to join our dynamic team, working on state of the art technologies. In this role, you will be responsible for the verification of complex FPGA designs, ensuring their functionality, performance, and reliability. Skills: FPGA UVM System Verlilog
Oct 16, 2025;
from:
dice.com