Description:
Job Title: Design/FPGA Verification Engineer Location: Mountain View, CA-Onsite Duration: 12+ Months Job Description Strong understanding of FPGA design principles and architectures. Proficiency in System Verilog and UVM verification methodology. Experience with industry-standard verification tools (e.g., QuestaSim, Synopsys VCS). Knowledge of code coverage and functional coverage analysis. Excellent debugging and problem-solving skills. Strong communication and collaboration skills. Requireme
Oct 16, 2025;
from:
dice.com