Description:
We are looking for DFT / ATPG Engineer for our client in Santa Clara, CA Job Title: DFT / ATPG Engineer Job Location: Santa Clara, CA Job Type: Contract Job Description: Pay Range: $82hr - $103hrThe DFT Design Engineer will be part of the DFT design team responsible for scan/ATPG testing of advanced SoCs. This role includes developing chip-level flows, pattern retargeting and simulation, scan timing simulations, and collaborating with test engineering teams for successful silicon bring-up of sc
Nov 4, 2025;
from:
dice.com