... Frontend Synthesis/STA Engineer Job Summary We are seeking ... design, synthesis, and static timing analysis. Key Responsibilities 1. ... designs. 3. Conduct static timing analysis (STA) to ensure ... design meets timing requirements. 4. Collaborate with ...
a day ago
... : Title: Infra Silicon Physical Design Engineer Location: Bay Area, CA/Austin ... -on tape-out experience performing timing and physical verification closure on ... blocks, SoC floorplan, clocking, and timing analysis) preferred - Expertise in
17 days ago
... at least one network switching ASIC (Broadcom, Marvell, or Microchip preferred ...
20 hours ago
... run efficiently on our AI-ASIC to power real-time inference ... will work extensively with AI engineers and come up with novel ...
8 days ago
... : Job Title: Senior Design Verification Engineer Location: Mountainview, CA What candidate ... of 8 years of experience in ASIC or a related field, or a
10 days ago
... . level Digital Signal Processing (DSP) R&D Engineer to join their growing team ...
16 days ago
... seeking outstanding Senior Design Verification Engineers with a specialty in tools and ...
27 days ago
... Companies is hiring a Hardware Engineer for a start up company located ... , CA. The Hardware Engineer will be helping to ... . Responsibilities for the Hardware Engineer: Write hardware specifications and ... capture.Collaborate with ASIC teams for hardware br
8 days ago
... Companies is hiring a Hardware Engineer for a start up company located ... , CA. The Hardware Engineer will be helping to ... . Responsibilities for the Hardware Engineer: Write hardware specifications and ... capture.Collaborate with ASIC teams for hardware br
21 days ago
... Companies is hiring a Hardware Engineer for a start up company located ... , CA. The Hardware Engineer will be helping to ... . Responsibilities for the Hardware Engineer: Write hardware specifications and ... capture.Collaborate with ASIC teams for hardware br
28 days ago
... : Job Title: GLS Design Verification Engineer Location: Canada Remote Duration / Term ... understanding of RTL synthesis, Static Timing Analysis & LEC Flows.Exp
a day ago
... : Job Title: GLS Design Verification Engineer Location: Canada Remote Duration / Term ... understanding of RTL synthesis, Static Timing Analysis & LEC Flows.Exp
3 days ago
... : Job Title: GLS Design Verification Engineer Location: Canada Remote Duration / Term ... understanding of RTL synthesis, Static Timing Analysis & LEC Flows.Exp
5 days ago
... seeking an innovative CAD Software Engineer with particular interest in strategies ... for large scale RTL quality, timing, and power optimization. Such optimization ...
6 days ago
... : Job Title: GLS Design Verification Engineer Location: Canada Remote Duration / Term ... understanding of RTL synthesis, Static Timing Analysis & LEC Flows.Exp
9 days ago
... : Job Title: GLS Design Verification Engineer Location: Canada Remote Duration / Term ... understanding of RTL synthesis, Static Timing Analysis & LEC Flows.Exp
10 days ago
... : R0218604 Space Vehicle Bus Systems Engineer The Opportunity: Are you looking ... in modernizing position, navigation, and timing systems? You understand your customer ...
10 days ago
... : R0218607 Space Vehicle Payloads Systems Engineer, Senior The Opportunity: Are you ... in modernizing position, navigation, and timing systems? You understand your customer ...
10 days ago
... : R0218603 Space Vehicle Payloads Systems Engineer The Opportunity: Are you looking ... in modernizing position, navigation, and timing systems? You understand your customer ...
10 days ago
... Number: R0218606 Launch Integration Systems Engineer The Opportunity: Are you looking ... in modernizing position, navigation and timing systems? You understand your customer ...
10 days ago