Description: Are you looking to elevate your cyber career? Your technical skills? Your opportunity for growth? Deloitte's Government and Public Services Cyber Practice (GPS Cyber Practice) is the place for you! Our GPS Cyber Practice helps organizations ...
8 days ago
... Responsibilities:Define and implement IP/SoC verification plans, build verification test ... to enable IP/sub-system/SoC level verification. Develop functional tests ...
17 days ago
... EngineerLocation: Sunnyvale, CA [On-site] SoC/DDR High speed design Interfaces ... ) independently. They have expertise in SoC/DDR design, memory devices, high ...
17 hours ago
... validation of complex ASIC SOC and FPGA SOC - Perform Post-Silicon/FPGA ...
25 days ago
... on Mars. SOC/ASIC TIMING SIGNOFF & FRONT-END IMPLEMENTATION ENGINEER (SILICON ENGINEERING ...
13 days ago
Description: Role: CAD/EDA Engineer Silicon Design/Verification Infrastructure Location: ... of experience in EDA/CAD SoC/IP design and/or verification ... work experience. Knowledge of ASIC/SoC design flows, SystemVerilog, and UVM ...
16 days ago
Description: Title: Sr. Design Verification Engineer Location: Onsite - Sunnyvale, CA (or) ... ) Responsibilities: Define and implement IP/SoC verification plans, build verification test ... to enable IP/sub-system/SoC level verification Develop functional tests ...
17 days ago
Description: Role: STA Engineer (TCM expertise is mandatory) Location: ... related, analysis at SS and SOC level. no specific IP expertise ...
15 hours ago
Description: Senior Design Verification Engineer SV/UVM Contract Long Term ... environments for IP, subsystem, and SoC-level simulationsWrite directed and constrained ...
a day ago
Description: Role: Debug Hardware Engineer Location Mountain View, CA - onsite ... BMC NIC PSU FPGA ARM SoC to the recipe level as ...
a day ago
Description: Position Title: Design Verification Engineer Location: Mountain View, CA - Onsite ... verification environments for IP/subsystem/SoC level testing Develop directed and ...
a day ago
Description: Role: Electrical Design Engineer Location: Sunnyvale, CA [On-site] ... Note: We need Engineers with Electrical/Electronic HW design ... ) independently. They have expertise in SoC/DDR design, memory devices, high ...
2 days ago
Description: Role: Electrical Design Engineer Hiring Mode: Contract (TP) Location: ... [On-site] Note: We need Engineers with Electrical/Electronic HW design ... ) independently. They have expertise in SoC/DDR design, memory devices, high ...
2 days ago
... : Systems Hardware Architect / Design Verification Engineer Mountain View, CA NO 14 ... verification environments for IP/subsystem/SoC level testingDevelop directed and random ...
3 days ago
... ) independently. They have expertise in SoC/DDR design, memory devices, high ...
3 days ago
... on mobile SoC from qualcomm, mediatek etc. Experienced Electrical Engineer to work ...
3 days ago
Description: Role: Hardware Validation Engineer Hiring Mode: Contract (TP) Location: ... ) independently. They have expertise in SoC/DDR design, memory devices, high ...
3 days ago
Description: Role: Hardware Validation Engineer Location: Sunnyvale, CA [On-site] ... ) independently. They have expertise in SoC/DDR design, memory devices, high ...
4 days ago
Description: Role: Silicon Validation Engineer Location: Mountain View, CA Duration: ... validation test plans for various SoC features and subsystems in one ...
4 days ago
... ) is a plus * Experience with the SOC Hardware/Software architecture and its ...
4 days ago