... , Full Time / Permanent Role Role: Design Verification Engineer Location : Sunnyvale CA / Austin TX ... . Build UVM/System Verilog-based verification environments for IP/subsystem/SoC ...
4 days ago
Description: CAE Design Optimization EngineerRole SummarySupport vehicle design teams across NVH, crash, durability ... mass, improve performance, and guide design decisions for current and future ...
4 days ago
Description: Requisition Number: 25464 Required Travel: 11 - 25% Employment Type: Full Time/Salaried/Exempt Anticipated Salary Range: $94,713.00 - $135,304.00 Security Clearance: Secret Level of Experience: Mid This opportunity resides with Warfare ...
4 days ago
Description: Job Title: FPGA/Design Verification Engineer Location: Mountain View, CA (Onsite) ... FPGA design principles and architectures. Proficiency in System Verilog and UVM verification ...
4 days ago
... Job Title: Senior ASIC/RTL Design Engineer Job Location: San Jose, CA ... .45hr - $78.78hrThe ASIC/RTL Design Engineer Senior is responsible for designing ... close collaboration with architecture, verification, and physical design teams to deliver high ...
3 days ago
... Description Machine Learning Engineer Title: On Device ML Engineer Location: Carlsbad, CA ... that has the most advanced design, test & verification labs in the IT ... have the need for a ML Engineer. Position Overview We are seeking a
3 days ago
... Test Engineer will be responsible for developing and maintaining system verification and ... have influence on the system verification and v
4 days ago
Description: JOB TITLE: Test Engineer JOB LOCATION: Goleta, CA WAGE ... optical performance, analysis, and test verification for EO/IR Focal Plane ...
3 days ago
... Job Description As the Senior Engineer in Software Quality Engineering, you ... efforts to deliver quality centric V&V (Verification & Validation) testing Job Description ...
4 days ago
... a constellation emerges-identity and business verification, ownership and control checks, sanctions ...
4 days ago
Description: Principal RTL Design Engineer / Senior FPGA Design Engineer Needed for Leading Telecom Company! ... for a talented Staff RTL Design Engineer / Principal FPGA Design Engineer! Why join us? As ...
4 days ago
... / Hardware Design Engineer We are seeking an FPGA/Hardware Engineer to help design and ... . This role involves hands-on design, testing, and support of production ... , SDI). Implement and optimize RTL designs, with a focus on 4K performance ...
3 days ago
... TCS - 41837 Roles & Responsibilities: Mechanical engineer / Design engineers, with Manufacturing engineering backgroundNew Product ... , fulfilling the requirements of Project Engineers, Design Engineers, Mechanical Engineers, and Stress engineersDevelop the ...
4 days ago
Description: Role: Senior Analog Design EngineerLocation: Santa Clara, CA Onsite ... senior-level engineer with good analog mixed-signal CMOS design background. In ... , you will assist with the design of mixed-signal integrated circuits ...
23 hours ago
Description: Sr. Software Engineer (UI & Java Developer) 12+ Months ( ... design, development, analysis and data modeling. Design techniques such as Domain-Driven Design, Design ...
2 days ago
... : Analog and Mixed-Signal Layout Engineer Job Description The candidate should ... and IP level Analog layout design, coordinating with the circuit designer ... to work with both design engineers and mask design engineers in remote locations, and ...
3 days ago
Description: Low Voltage Design Engineer for a leading design firm in LA! This Jobot ... of innovation, precision, and sustainable design with our talented professionals diverse ...
3 days ago
Description: Role: Mechanical Design Engineer Location: Los Angeles, CA ... job responsibilities Perform mechanical design and layout trade ... space hardware Generate detailed designs via CAD systems ... and presentations for technical design reviews and as part ...
5 days ago
... : Job title: Azure Cloud DevOps Engineer Location: Sunnyvale CA-onsite Duration ... an experienced Azure Cloud DevOps Engineer to design, implement, and manage scalable ... /CD pipelines on Microsoft Azure. Design, build, and maintain CI/CD ...
3 days ago
... Description: Job Title: "Senior Layout Design Engineer" Location: San Jose, CA (Onsite ... on RF/Analog circuit layout design. The candidate will be developing ...
3 days ago