Description: Job Title: Embedded BSP Engineer with AI Experience Experience : 10+ ... Integration: Experience with PyTorch, LLM on SoC, and AI acceleration on BSP.RTL ...
9 days ago
... Director for RTL Design highly experienced with leading a group of engineers and ... for RTL Design include: Prior experience leading or building a team of engineers ... . Advanced knowledge and hands on experience with RTL coding Hardware ...
18 hours ago
... Director for RTL Design highly experienced with leading a group of engineers and ... for RTL Design include: Prior experience leading or building a team of engineers ... . Advanced knowledge and hands on experience with RTL coding Hardware ...
7 days ago
... Director for RTL Design highly experienced with leading a group of engineers and ... for RTL Design include: Prior experience leading or building a team of engineers ... . Advanced knowledge and hands on experience with RTL coding Hardware ...
14 days ago
... Director for RTL Design highly experienced with leading a group of engineers and ... for RTL Design include: Prior experience leading or building a team of engineers ... . Advanced knowledge and hands on experience with RTL coding Hardware ...
17 days ago
... experience in Digital design at RTL level using Verilog/System Verilog ... . Experience supporting SoC designers in integration as needed Strong communication and ...
26 days ago
... : Job Title: Senior Machine Learning Engineer Location: Cupertino, CA (Hybrid - 3 days ... are seeking a highly skilled ML Engineer to join our team. You ... ensuring seamless integration pipeline. Essential functions: Design and implement complex LLM applications ...
11 days ago
Description: Job Title: ML Engineer Location: Cupertino CA (Hybrid 3 Days ... are seeking a highly skilled ML Engineer to join our team. You ... ensuring seamless integration pipeline. Essential functions Design and implement complex LLM applications ...
17 days ago
... defined features/escalations Create updated RTL design for identified issues and ... UVMF Support mono, functional & SW integration through customer delivery Documentation updates ...
a day ago
... Companies is hiring a FPGA Verification Engineer for a large organization located in ... performing IP integration verification, and collaborating closely with RTL designers to debug ... failures. The FPGA Verification Engineer will ...
18 hours ago
... looking for Senior Machine Learning LLM Engineer/Cupertino, CA (Hybrid). Anyone interested ... share your resume at Title: LLM Engineer/Cupertino, CA (Hybrid)/Full Time ... are seeking a highly skilled ML Engineer to join our team. You ...
3 days ago
... Companies is hiring a FPGA Verification Engineer for a large organization located in ... performing IP integration verification, and collaborating closely with RTL designers to debug ... failures. The FPGA Verification Engineer will ...
7 days ago
... Companies is hiring a FPGA Verification Engineer for a large organization located in ... performing IP integration verification, and collaborating closely with RTL designers to debug ... failures. The FPGA Verification Engineer will ...
11 days ago
... : SCALA SPARK Nice to Haves: LLM s Gen AI Description: Will be ...
25 days ago
... is currently seeking a Machine Learning Engineer to work for our client ... duties: Quickly prototype and test LLM-based AI agent use cases ... models and LLMsSolid knowledge on LLM-based agent development, strong hands
8 days ago
... , error, and connectivity, both for RTL and Gate Level Netlist Design ...
19 days ago
... for a FPGA Verification Engineer to work onsite in ... The ideal FPGA Verification Engineer will ensure the integrity ... . Responsibilities for FPGA Verification Engineer: Develop and implement object ... UVM. Collaborate closely with RTL designers to debug and ...
2 days ago
... Subsystem Looking for a Design Verification Engineer to play a key role in ... , & driving functional verification at the RTL level. The ideal person would ...
3 days ago
... for a FPGA Verification Engineer to work onsite in ... The ideal FPGA Verification Engineer will ensure the integrity ... . Responsibilities for FPGA Verification Engineer: Develop and implement object ... UVM. Collaborate closely with RTL designers to debug and ...
3 days ago
... for a FPGA Verification Engineer to work onsite in ... The ideal FPGA Verification Engineer will ensure the integrity ... . Responsibilities for FPGA Verification Engineer: Develop and implement object ... UVM. Collaborate closely with RTL designers to debug and ...
7 days ago