Description: Role: Design verification EngineerLocation: Sunnyvale or Austin, ... RTL and Gate Level Netlist Design Unde
17 days ago
... of strong experience in Digital design at RTL level using Verilog ... from requirements specifications Experience developing designs from scratch Experience applying linting ... checking and basic verification of designs. Experience supporting SoC designers in ...
24 days ago
... . Our engineering, cloud, data, experience design, and talent solution capabilities accelerate ...
27 days ago
Description: Design Engineer (with Catia) _ 8+ years _ Onsite @ Irvine, ...
17 days ago
... Engineer will ensure the integrity and functionality of a digital design environment for FPGA design ... using Verilog and UVM. Responsibilities for FPGA Verification Engineer: Develop ...
21 hours ago
... Engineer will ensure the integrity and functionality of a digital design environment for FPGA design ... using Verilog and UVM. Responsibilities for FPGA Verification Engineer: Develop ...
a day ago
... Engineer will ensure the integrity and functionality of a digital design environment for FPGA design ... using Verilog and UVM. Responsibilities for FPGA Verification Engineer: Develop ...
5 days ago
... Engineer will ensure the integrity and functionality of a digital design environment for FPGA design ... using Verilog and UVM. Responsibilities for FPGA Verification Engineer: Develop ...
8 days ago
... Engineer will ensure the integrity and functionality of a digital design environment for FPGA design ... using Verilog and UVM. Responsibilities for FPGA Verification Engineer: Develop ...
12 days ago
... : Piper Companies is hiring a FPGA Verification Engineer for a large organization located in ... CA. The FPGA Verification Engineer will focus on verifying FPGA designs in routers, ensuring ... to debug failures. The FPGA Verification Engineer will need to sit ...
5 days ago
... : Piper Companies is hiring a FPGA Verification Engineer for a large organization located in ... CA. The FPGA Verification Engineer will focus on verifying FPGA designs in routers, ensuring ... to debug failures. The FPGA Verification Engineer will need to sit ...
9 days ago
... design, implementation, validation, and release to manufacturing. Hardware design, schematics generation, and design validation Support design ... functional validation from cross ...
2 days ago
Description: Role: Debugging Engineer Location: Milpitas, CA Type: Fulltime ... manufacturing.Hardware design, schematics generation, board design and design validation experienceSupport design functional validation from cross ...
3 days ago
$85
$105
an hour
Description: Title: Hardware Design Engineer 5 Location: Mountain View CA 94043 ... Bring-up and Validation Engineer involves the initiation and validation and characterization. It ... covers aspects such as physical design, ...
22 days ago
... space optics). Responsibilities: Focus on design validation of VCSELs, photodiodes, and related ... device characterization to validate the design. Failure mode analysis, root-cause ...
2 days ago
... engineering principles, product design, and manufacturing processes. Experience in design validation, simulations, and ...
10 days ago
Description: Job Title: Mechanical Engineer Location: Cupertino, CA Design mechanical chassis, enclosure for ... potential manufacturing vendor. Participate in design validation and characterization during prototype bring ...
3 days ago
... experienced and motivated PCB Hardware Validation Engineer to join our team. In ...
27 days ago
Description: Position: DevOps Engineer Location: Remote Duration: 4 months to ... software upgrades and patches * Design and engineer solutions to help support advanced ...
14 days ago
... ASIC SOC and FPGA SOC - Perform Post-Silicon/FPGA validation by defining testing ... infrastructure to complete functional validation of complex design and report bug/issues ... - Innovate to improve validation efficiency ...
3 days ago