Description: Position: PCIe Validation Engineer Location: San Diego, CA Exp: 5-8 years PCIe Gen 4/5/6, CXL ... Take lead responsibility for validating PCIe and its subsystems on multiple ...
10 days ago
Description: Job Title: Design Verification Engineer Location: CA Experience Level: ... We are seeking a skilled Design Verification Engineer with strong expertise in System ... or Design IPs into the verification environment. Responsibilities: Develop, enhance, ...
18 days ago
... Linux, RTOS); high-speed interfaces (PCIe and Ethernet); memory technologies: DDR3 ...
a month ago