... and Power Integrity (SI/PI) Design Engineer Location: San Jose, CA 100 ... Job Type: Contract SI/PI Design Engineer Responsibilities: Lead chip-package-system ... co-design efforts by analyzing and optimizing ...
13 days ago
Description: Role: Post-Silicon Validation Engineer Location: San Jose, CA Hybrid ... engineering. Solid understanding of IC design, Design for Test (DFT), and manufacturing ...
13 days ago
Description: Role: Mixed-Signal Verification Engineer Location: San Jose, CA 100% ... of digital design for mixed-signal control loops and experience writing Verilog ...
13 days ago