Description: FPGA Consultant San Jose, CA ( Onsite) Full time permanent Hire F2F Interview at client site 12+ years of hardware engineering and architecture with experience delivering mission critical products. 10+ year's experience with FPGA development. ...
3 days ago
Description: Physical Design Engineer Long term Contract First preference : San Jose, CA ( Onsite) Mandatory Skills/Experience Experience in leading and executing Full-chip Hierarchical Physical Design of Mixed-signal chips. Experience in understanding ...
7 days ago
Description: Looking for an experience candidate who can support us in the lab, who can read the schematics, help in the lab for debug, someone with hardware bgv, design, being in the lab working directly with the product, write some small shell script, ...
8 days ago
Description: Position: STA Engineer Location: San Jose CA (Day-1 Onsite) 12 months Must have/Primary skills: Fullchip timing, SDC changes back to block level, Block/Full chip SDC development, Static Timing Analysis, Primetime/Tempus
8 days ago
Description: PSV PCIE Validation & Emulation Engineer San Jose, CA ( Onsite) Long Term Contract or Full time hire PCIE 4.0, 5.0. 6.0, C/C++, IOMMU, RISC V, x86-64 architecture, accelerator, Oscilloscope, Multimeter, Logic Analyzer, performance benchmarks ...
13 days ago
Description: Position: SDC Engineer Location: San Jose CA (Day-1 Onsite) Long Term Contract SDC:/Design Constraints and STA: Timing Analysis (PrimeTime) : Very good knowledge in writing Timing Constraints with these tools Digital Circuits: Person should ...
14 days ago
Description: Position: SDC Engineer Location: San Jose CA(5 Days a week ONSITE) Long Term Contract Must have/Primary skills: Fullchip timing, SDC changes back to block level, Block/Full chip SDC development, Static Timing Analysis, Primetime/Tempus What ...
14 days ago
Description: Job Title: PSV PCIE Validation & Emulation Engineer Location: San Jose, CA (Onsite) Hiring Type: W2 Contract Job Description: Good knowledge and understanding of PCIe Architecture, Validation, Debug Experience.Exposure to PCIe BAR and IOMMU ...
17 days ago
Description: PSV Memory Validation & Emulation Engineer San Jose, CA Long Term Contract or Full time Hire Experience in Hardware Debug Skills - Oscilloscope, Multimeter, Logic Analyzer 5 to 8 years of experience Good knowledge and understanding of LPDDR ...
17 days ago