Description: Physical Design Engineer Long term Contract First preference : ... executing Full-chip Hierarchical Physical Design of Mixed-signal chips. Experience ... in understanding and writing synthesis design constraints for hierarchical physical partitions ...

21 hours ago

Hardware Engineer (Designing/ Board Testing) with strong PCIe Gen 5 Standards

Wise Equation Solutions Inc.
San Jose

... debug, someone with hardware bgv, design, being in the lab working ... , open up board file, board design PCIE gen 4 or PCIe Gen ... : Hardware design engineer OR Board design engineer Hands on Board Design experience as a engineer having done ...

a day ago

SDC Engineer ( Fullchip timing / SDC development, Static Timing Analysis )

Wise Equation Solutions Inc.
San Jose

... Engineer Location: San Jose CA (Day-1 Onsite) Long Term Contract SDC:/Design ... should be very strong in Design Fundamentals so can make right ... act as a bridge between Design & Physical Design team and provide solutions to ...

7 days ago

Block/full chip SDC Design Verification Engineer(Static Timing Analysis, Analyzer tools, Spyglass CDC)

Wise Equation Solutions Inc.
San Jose

Description: Position: SDC Engineer Location: San Jose CA(5 Days a ... Be Doing: Being a member of design team who oversees fullchip SDCs ... and works with physical design and DFT teams to close ... also do block level RTL design or block or top-level ...

7 days ago

Get new staff asic design engineer jobs in San Jose by email

By creating a job alert, you agree to our Terms You can change your consent settings at any time by unsubscribing or as detailed in our terms.