Description: ResponsibilitiesOwn verification of entire FPGA design used in high- ... and interact with design engineers to identify verification scenariosCreate test plans, ... constrained-random verification environments, test cases, regressions, ...
25 days ago
... Summary:Drive the pre-silicon verification of next-generation PCIe Switch ...
8 days ago
Description: Salary Verbias for San Jose, CA: GlobalLogic estimates the starting pay range for this role to be performed within the USA to be $135K to $155K and reflects base salary only and does not include additional performance-linked variable ...
8 days ago
... is looking for a qualified FPGA / RTL Design Engineer in San Jose, CA ...
23 days ago
... a highly skilled and motivated DFT Engineer with 6+ years of experience to ... will work closely with design, verification, and product engineering teams to ...
16 days ago
... the position of Signal Integrity Engineer to help design and build ... Platform Solutions. The Signal Integrity Engineer will play a critical role as ... digital PCB designs, simulation, lab verification, and troubleshooting signal integrity issues o
23 days ago
... the position of Signal Integrity Engineer to help design and build ... Platform Solutions. The Signal Integrity Engineer will play a critical role as ... digital PCB designs, simulation, lab verification, and troubleshooting signal integrity issues
23 days ago