Description: Role: FPGA Verification Engineer Location: San Jose, CA - Hybrid - (4 ... : 1+ year Job Description Own verification of entire FPGA design used in high ... and interact with design engineers to identify verification scenarios. Create test plans ...
a day ago
... FPGA Verification Engineer Location: San Jose, CA - Onsite Job Description & Responsibilities Own verification ... of entire FPGA design used in ... with design engineers to identify verification scenariosCreate test plans ...
3 days ago
Description: ResponsibilitiesOwn verification of entire FPGA design used in high- ... and interact with design engineers to identify verification scenariosCreate test plans, ... constrained-random verification environments, test cases, regressions, ...
25 days ago
Description: Job Title: RTL / FPGA Design EngineerLocation: San Jose, CA( ... seeking an experienced RTL / FPGA Design Engineer with strong hands-on expertise ... in FPGA design, simulation, synthesis, and ...
25 days ago
Description: Job Title: GPU Design Verification Engineer Location: San Jose, CA (Onsite) ... are seeking a highly skilled Design Verification Engineer to join our team at ... be on developing and executing verification plans, creating testbenches, and debugging ...
30 days ago
... are seeking a highly skilled Design Verification Engineer to join our team.The ... be on developing and executing verification plans, creating testbenches, and debugging ... . Responsibilities Develop and execute comprehensive verification plans for GPU
a month ago
Description: Role: Senior/Staff VLSI Engineer Ethernet FEC DV Duration: 12+ ... skilled and motivated VLSI Design Verification Engineer with deep expertise in Forward ... role, you will own the verification of advanced FEC IP cores ...
2 days ago
... Summary:Drive the pre-silicon verification of next-generation PCIe Switch ...
8 days ago
Description: Salary Verbias for San Jose, CA: GlobalLogic estimates the starting pay range for this role to be performed within the USA to be $135K to $155K and reflects base salary only and does not include additional performance-linked variable ...
8 days ago
Description: JD Digital DV within a mixed signal chip (ADC), Digital based simulation environment, Test bench not required, it is available already, Test cases to be developed. No need to develop models, Develop test plan etc.. System Verilog, Unix/Linux, ...
10 days ago
Description: Position: FPGA Verification Contractor Location: San Jose, CA ( ... Job Description & Responsibilities Own verification of theentire FPGA designused inhigh-end router ...
25 days ago
... IP is hiring for a Verification Engineer to join their high-performance ... team! Responsibilities include: - Developing verification environments using System Verilog and ... UVM - Designing verification components and behavioral models - ...
25 days ago
$58
$60
an hour
Description: (Local Candidates Only) FPGA/RTL Design Engineer San Jose, CA - 100% Onsite ... Must-Have Skills: RTL Design FPGA experience: Design, simulation, synthesis, and ...
25 days ago
$50
$55
an hour
Description: Locals Only! Emulation & Prototyping Engineer (2 Openings) San Jose, CA - Hybrid ( ... : 3-5 yrs hardware design/SoC experience FPGA & RTL design (Verilog/SystemVerilog) Hands ... emulation models Perform pre-silicon verification & SoC bri
3 days ago
... Design Engineer - Emulation and Prototyping - Hybrid Mandatory skills: hardware design, FPGA Design ... , Synopsys HAPS, Zebu, Protium, Palladium, FPGA, emulation platforms, RTL Design, Verilog ...
a day ago
... is looking for a qualified FPGA / RTL Design Engineer in San Jose, CA ...
23 days ago
Description: Sr. Principal Embedded Software Engineer San Jose, CA(Onsite 4 days/ ... , Jira, Jenkins, Agile Bonus: Yocto, FPGA/SoC interfaces, device drivers, a
23 days ago
... a highly skilled and motivated DFT Engineer with 6+ years of experience to ... will work closely with design, verification, and product engineering teams to ...
16 days ago
... the position of Signal Integrity Engineer to help design and build ... Platform Solutions. The Signal Integrity Engineer will play a critical role as ... digital PCB designs, simulation, lab verification, and troubleshooting signal integrity issues o
23 days ago
... the position of Signal Integrity Engineer to help design and build ... Platform Solutions. The Signal Integrity Engineer will play a critical role as ... digital PCB designs, simulation, lab verification, and troubleshooting signal integrity issues
23 days ago