Description: Position: PCIe Validation Engineer Exp: 5-8 years PCIe Gen 4/5/6, CXL, RISC-V, ARM, Oscilloscope, ... Take lead responsibility for validating PCIe and its subsystems on multiple ...
15 days ago
Description: ResponsibilitiesOwn verification of entire FPGA design ... and interact with design engineers to identify verification scenariosCreate test plans, constrained ... -random verification environments, test cases, regressions, and ...
17 days ago
... & Power Integrity Engineer to support high-speed interfaces (LPDDR5X, PCIe Gen7, UCIe ...
7 days ago
... a highly skilled and motivated DFT Engineer with 6+ years of experience to ... will work closely with design, verification, and product engineering teams to ...
7 days ago
... Senior ASIC/RTL Design Engineer for our client in ... : Senior ASIC/RTL Design Engineer Job Location: San Jose, ... 78.78hrThe ASIC/RTL Design Engineer Senior is responsible for designing ... close collaboration with architecture, verification, and physical design teams ...
29 days ago
... -mechanical group, working alongside other engineers to create effective test methodologies ... . Your responsibilities will include design verification-developing test plans and protocols ...
24 days ago
... the position of Signal Integrity Engineer to help design and build ... Platform Solutions. The Signal Integrity Engineer will play a critical role as ... digital PCB designs, simulation, lab verification, and troubleshooting signal integrity issues o
14 days ago
... the position of Signal Integrity Engineer to help design and build ... Platform Solutions. The Signal Integrity Engineer will play a critical role as ... digital PCB designs, simulation, lab verification, and troubleshooting signal integrity issues
14 days ago