... an opening for Mixed-Signal Design Verification Engineer with our Client ... Good knowledge of System-Verilog RTL coding including state machines, adders ... , etc.Good understanding of digital design for mixed signal control loops ...
28 days ago
$50
$60
an hour
... for a Senior QA Engineer in Santa Clara, CA. Responsibilities: Design, develop, and ...
7 days ago
... : Description We are looking for a Senior Quality Assurance Engineer to join ... in agile environments. Key Responsibilities Design, develop, and execute detailed test ...
12 days ago
Description: Position: Senior Mobile Security Architect Location: San ... digital product engineering company that designs and develops chip-to-cloud ...
12 days ago
... digital product engineering company that designs and develops chip-to-cloud ...
13 days ago
... -million gate SoC designs onto prototyping platforms, creating design partitions, FPGA builds ... to engage in block-level RTL design or block or top-level ... IP integration. Collaborate with Software, Design, and V
18 days ago
... /SOX department, reporting to the Senior Director, Internal Audit and SOX. The ...
12 days ago
... /SOX department, reporting to the Senior Director, Internal Audit and SOX. The ...
13 days ago
... ) for complex chip-level ASIC designs Perform static timing analysis (STA ... with RTL, architecture, and physical design teams on clock structures and design intent ...
11 days ago
... timing constraints for complex ASIC designs at the chip level. Your ... cross-functional teams, including RTL designers, physical design engineers, and verification teams ...
11 days ago
... ) Contract(No OPT) Job Description: Senior level (5 to 8 years) experience in ... write code and understand the design of a system.Strong knowledge of ...
5 days ago
Description: Reston, VirginiaMust have: Senior Level- Staff/Managing teams/ LEAD/ ... NodeJS libraries including its dependencies. " Design and implement new features for ...
24 days ago