Description: Package Design Engineer in the US, please share ...
7 days ago
Description: Requirements/Skills: Possess Mentor Graphics, Cadence, PLA knowledge Multiple layers package design (8+) experience Understanding of substrate manufacturing design rule and assembly rule Possess Flip Chip Package Design Concept Good ...
a day ago
Description: Requirements/Skills: Exp: 5-8 years of experience. Possess Mentor Graphics, Cadence, PLA knowledge Multiple layers package design (8+) experienceUnderstanding of substrate manufacturing design rule and assembly rulePossess Flip Chip Package ...
6 days ago