Description: Job Title: Computer Vision Analytics Engineer Medical Video/Image Analytics Duration: 12 Months ( Contract to Hire) Location: SFO/Santa Clara, CA Onsite 3-4 days in a week in the office. Number of openings - 2 Job Description: We are seeking ...
17 days ago
Description: Senior Product Lead - Advanced Packaging and Semiconductor Electronics Position Overview: We are seeking a Senior Product Lead with deep expertise in Semiconductor Electronics and ASIC Design, particularly in mixed-signal design, chiplet ...
17 days ago
Description: Job Title: Project Portfolio Coordinator Location: Onsite Santa Clara, CA office 5 days per week Duration: 6+ months with possible extensions Job Description: We are seeking a dynamic, detail-oriented, and proactive Project Portfolio ...
17 days ago
Description: Must haves in experience: 1.Expertise in SAP Central finance will be the primary requirement 2. RAR is not a primary requirement and can be taken off the list. Experience: Deep Understanding of SAP S/4 central Finance, particularly in areas ...
17 days ago
Description: Job Title: SAP S/4 Finance ConsultantWork Location: Santa Clara, CA (Onsite)Duration: 6+ months Contract 1.Expertise in SAP Central finance will be the primary requirement2. RAR is not a primary requirement and can be taken off the list. SAP ...
17 days ago
Description: Company: iTech US, Inc. Job Title: Mendix Developer Location : 100% Onsite. Santa Clara, CA Job Responsibilities: Design, develop, and maintain high-quality applications using Mendix.Collaborate with cross-functional teams to define, design, ...
17 days ago
Description: Role: Network Engineer (On-Prem, Azure Cloud) Location: Santa Clara, CA (Onsite 5 days/week) Duration: 6 Months Contract-to-Hire Job Summary: Seeking an experienced Network Engineer with 10+ years of expertise in managing complex networks, ...
23 days ago
Description: Job Description: Experience: 8+ years in mobile development, with proven success in designing complex, enterprise-grade solutions. Technical Skills: Proficiency in iOS/Android or cross-platform frameworks (e.g., React Native, Flutter), plus ...
23 days ago
Description: Hi, My Name is Manjunatha and I represent MSys Technologies, a Minority Certified , Alpharetta, GA-based global firm founded in 2007. At MSys, we specialize in Staff Augmentation, Product engineering, and Technology services.We are a Product ...
23 days ago
Description: Job Role:: SAP S/4 Finance Consultant Location:: Santa Clara, CA, USA Mode:: 6 to 12 Months SAP Finance Deep Understanding of SAP S/4 central Finance, particularly in areas related to GL, AR, revenue and cost accountingABAP programming for ...
23 days ago
Description: Job Title: HRIS Program Manager Location: Santa Clara, CA (Hybrid) Duration: 12+ Months Job Description: Are you a seasoned Program Manager with a passion for managing complex projects and a knack for leading successful HR/HRIS programs? If ...
23 days ago
Description: Job Title: Lead Engineer - AI and FPGA Integration Expert Experience : 10-15 years Location: Santa Clara, California Technical Skills FPGA & AI Model Integration: Experience with PyTorch, LLM on SoC, and AI acceleration on FPGA.RTL ...
24 days ago
Description: Responsibilities: Design and develop NaaS solutions for SmartEdge and Cloud.Drive technical solutions across teams for data paths, routing, and security.Develop software using CNF/VNF, Kubernetes/Docker, and cloud offload.Lead projects, ...
24 days ago
Description: Required: Minimum 10 years of strong experience in Digital design at RTL level using Verilog/System Verilog Experience in developing micro architectural document from requirements specifications Experience developing designs from scratch ...
24 days ago
Description: JOB DESCRIPTION Architect, Design and Develop NaaS Network as a Service solutions focusing on SmartEdge Product and Cloud. Solution would include other products like AP and Switch to provide an overall solution. Work with PLM and other ...
24 days ago
Description: Looking for Lead layout design for high-performance analog cores (ADCs, DACs, PLLs, transceivers) in CMOS process nodes (5nm to 65nm). Set up LVS, DRC, and ERC environments, debug using Cadence and Mentor tools. Perform floor planning, ...
27 days ago