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Jobs and careers for tools automation engineer in Santa Clara (3 jobs)

Lead fpga verification engineer with uvm /verilog system-active requirement
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Lead FPGA Verification Engineer with UVM /Verilog System-Active Requirement

  • Data Capital Inc
  • Santa Clara
... ) Familiarity with industry-standard verification tools (e.g., QuestaSim, Synopsys VCS) Experience with ...
8 days ago

Lead FPGA Verification Engineer with UVM /Verilog System-Active Requirement

  • Data Capital Inc
  • Santa Clara
... )Familiarity with industry-standard verification tools (e.g., QuestaSim, Synopsys VCS)Experience with ...
10 days ago

Lead FPGA Verification Engineer with UVM /Verilog System-Active Requirement

  • Data Capital Inc
  • Santa Clara
... ) Familiarity with industry-standard verification tools (e.g., QuestaSim, Synopsys VCS) Experience with ...
14 days ago

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