What
Where
0
Home Browse jobs About us Contacts
  1. Home
  2. Santa Clara
  3. Senior fpga engineer
What
Where

Jobs and careers for senior fpga engineer in Santa Clara (3 jobs)

Lead fpga verification engineer with uvm /verilog system-active requirement
dice.com
Company
Period
Schedule
Employment
Location
Sort by:

Lead FPGA Verification Engineer with UVM /Verilog System-Active Requirement

  • Data Capital Inc
  • Santa Clara
Description: Mandate Skills: FPGA Verification Exp Strong SystemVerilog coding ( ... Verification Methodology)-UVM 5+ years of FPGA verification experience Strong SystemVerilog programming ...
5 days ago

Lead FPGA Verification Engineer with UVM /Verilog System-Active Requirement

  • Data Capital Inc
  • Santa Clara
Description: Mandate Skills: FPGA Verification Exp Strong SystemVerilog coding ( ... Verification Methodology)-UVM 5+ years of FPGA verification experienceStrong SystemVerilog programming skillsHands ...
8 days ago

Lead FPGA Verification Engineer with UVM /Verilog System-Active Requirement

  • Data Capital Inc
  • Santa Clara
Description: Mandate Skills: FPGA Verification Exp Strong SystemVerilog coding ( ... Verification Methodology)-UVM 5+ years of FPGA verification experience Strong SystemVerilog programming ...
12 days ago

Get new senior fpga engineer jobs in Santa Clara by email

By creating a job alert, you agree to our Terms You can change your consent settings at any time by unsubscribing or as detailed in our terms.