... in System Verilog and UVM verification methodologyExperience with Linux operating systemExperience ... with industry-standard verification tools (e.g., QuestaSim, Synopsys VCS, Haps ...
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Description: Role: Silicon Design Package Engineer Location: Hybrid (Santa Clara, CA) ...
21 days ago
Description: Overview Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering ( ...
3 days ago
Description: Overview Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering ( ...
3 days ago
... to re-apply.** The Department: Silicon Valley Power (SVP) currently provides ...
7 days ago
Description: Overview Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering ( ...
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Description: Overview Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering ( ...
28 days ago