Description: Title: Sr. Design Verification Engineer Location: Onsite - Sunnyvale, CA (or) ... and implement IP/SoC verification plans, build verification test benches to enable ... tests based on verification test plan Drive Design Verification to closure based ...
28 days ago
... : The main function of the Verification Engineer is to work with a group ... researchers and engineers to own the electrical system level verification of Client ... the art systems.Using verification skills to define verification requirements, create test ...
22 hours ago
... : The main function of the Verification Engineer is to work with a group ... researchers and engineers to own the electrical system level verification of client ... -the-art systems. Using verification skills to define verification requirements, create test ...
20 days ago
Description: Title: Verification Engineer Location: Sunnyvale, CA Type: Contract ... : The main function of the Verification Engineer is to work with a group ... researchers and engineers to own the electrical system level verification of client ...
21 days ago
Description: Verification Engineer IV Sunnyvale CA (Onsite) 6 months ( ... : The main function of the Verification Engineer is to work with a group ... -the-art systems.The engineer will define verification requirements, create test ca
21 days ago
Description: Pre-Silicon Verification Engineer Contract @ CA & TX - Onsite Job ... in Verilog, System Verilog, C/C++ based verification, and UVM methodologyExperience i
5 days ago
... in architecting and implementing Design Verification infrastructure and executing the complete ... the development of UVM based verification environments from scratchExperience with ... Design verification of Data-center applications ...
18 hours ago
Description: Contract Length: Initial 6-month contract (potential to go 18-months) Location:100% onsite in either Sunnyvale, CA, San Francisco, CA or Austin TX Industry: Social Media Work Authorization: Prefers G.C or U.S Citizen. Minimum Requirements ...
21 days ago
Description: Title: Post Silicon Engineer Location: Sunnyvale CA- Onsite Position ... 's/DSP) in Pre-Silicon (Virtual, Emulation and fpga platforms) & Post-Silicon (
7 days ago
Description: Title: Post Silicon Engineer Location: Sunnyvale, CA Type: Contract ... s/DSP) in Pre-Silicon (Virtual, Emulation and fpga platforms) & Post-Silicon ...
8 days ago
Description: ASIC Engineer (Design Verification) Bay Area, CA ... implement IP/SoC verification plans, build verification test benches to ... sub-system/SoC level verification. Develop functional tests ... based on verification test plan. Drive Design Verification to ...
7 days ago
... % Onsite role System Test Automation Engineer - Operations Job Type : Contract Location ... the screen while coding.Background Verification is Ma
a day ago
... : Title: Infra Silicon Physical Design Engineer Location: Bay Area, CA/Austin ... experience performing timing and physical verification closure on 5nm FinFET TSMC ...
7 days ago
... : Position : STA (Static Timing Analysis) Engineer Location: Sunnyvale CA or Redmond ... role Static Timing Analysis (STA) Engineer (NO 15+ YEARS RESUME) Job ... Analysis (STA) Engineer to contribute to the timing verification and closure of ...
21 days ago