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Jobs and careers for system validation engineer in Sunnyvale (59 jobs)

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... Overview As a Senior Software Simulation Validation Engineer, you will be a technical leader ... validity of highly complex simulation systems. This position will follow both ...
a day ago
... (Hybrid) 1 Full Stack Developer (Systems Integration Engineer) Focus: Integrating AI capabilities securely ... across enterprise systems Tech Stack: Python ...
5 days ago
... . Role: As a Software Systems E ngineer on the Software Validation team within the ... role in the execution of validation efforts for autonomous vehicle behavior ... will work with a team of engineers to def ine best practices ...
2 days ago
  • General Motors
  • Sunnyvale
... . Role: As a S enio r Systems Engineer, Perception, on the Software Validation team within the ... the strategy and execution of validation efforts for perception capabilities on ...
2 days ago
  • Meta Platforms, Inc. (f/k/a Facebook, Inc.)
  • Sunnyvale
... , CA Electrical Engineer: Responsible for the power circuit design, simulation, validation, and ...
8 days ago
  • Myticas LLC
  • Sunnyvale
... skilled and motivated ASIC Product Engineer to join our clients team ... responsible for developing specifications and validation methods for Analog ASICs used ...
10 days ago
  • Myticas LLC
  • Sunnyvale
... skilled and motivated ASIC Product Engineer to join our clients team ... responsible for developing specifications and validation methods for Analog ASICs used ...
14 days ago
  • Myticas LLC
  • Sunnyvale
... skilled and motivated ASIC Product Engineer to join our clients team ... responsible for developing specifications and validation methods for Analog ASICs used ...
15 days ago
  • Protingent, Inc.
  • Sunnyvale
Description: Position Title: FPGA Engineer Position Description: Protingent Staffing has ... Closure Simulation Validation Lab Based Silicon ValidationCollaborate with network communication system architects ...
26 days ago
... -driven reliability insights, and systematic validation processes. The mission is to ... will collaborate closely with Release Engineers, Sy
2 days ago
... an experienced Embedded Systems Engineer to join the silicon validation group of a Tier ...
a month ago
... . As a Senior ML/AI Software Engineer on the Sim Insights team ... stakeholders-from AV developers and system engineers to leadership-reach accurate, actionable ...
2 days ago
  • Lockheed Martin Corporation
  • Sunnyvale
... be the Mid-Career Cybersecurity Engineer for the Cybersecurity team which ... -Career Cybersecurity Engineer, you will be responsible for developing System Cyber architecture ...
8 days ago
  • Innova Solutions, Inc
  • Sunnyvale
... immediately hiring for a RTL Integration Engineer Position type: Full-time Location ... CA (Onsite) As a RTL Integration Engineer, you will need: The ideal ... integration (using Verilog, VHDL, or System Verilog).Hands-on experience with ...
23 days ago
  • Uber Corporate
  • Sunnyvale
... upon its real-time nervous system-a platform that processes billions of ... a foundational Senior/Staff Machine Learning Engineer to pioneer Uber's next generation ...
23 days ago
  • Innova Solutions, Inc
  • Sunnyvale
... hiring for a Performance Analysis & verification Engineer Position type: Fulltime Location: Sunnyvale ... -Onsite As a Performance Analysis & verification Engineer , you will be responsible for ... (as a plus) an understanding of System-on-Chip (SoC) design and ...
24 days ago
... on Mars. SR. WIRELESS SOFTWARE ENGINEER (STARLINK) At SpaceX we're ... world's most advanced broadband internet system. Starlink is the world's l
26 days ago
  • Meta Platforms, Inc. (f/k/a Facebook, Inc.)
  • Sunnyvale
... positions in Sunnyvale, CA Software Engineer System: Research, design, develop, build and ... test operating systems-level software, compilers, and network ...
2 days ago
  • Lockheed Martin Corporation
  • Sunnyvale
... constrains, trade-offs and detailed system and security design as they ...
11 days ago
  • Protingent, Inc.
  • Sunnyvale
... , self-checking testbenches implemented in System Verilog/UVMDevelop constrained-random, metric ...
24 days ago