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Verification Engineer - Specialized

Cynet Systems
Santa Clara Full-day Temporary

Description:

Job Description: Pay Range: $88hr - $103hr Responsibilities: Create and implement a verification plan. Develop and execute test cases to ensure the functionality, performance, and reliability of the chip design. CollaboXX with the hardware design team to identify and resolve issues. Work in a UVM environment. Use of Assertions, and randomized and direct tests. Code coverage and debugging. Analyze and report on verification results. Experience: 10-15 years of solid experience in UVM design veri
Jun 3, 2025;   from: dice.com

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