Where

STA Engineer/SDC Engineer

Prismagic Solutions Inc
San Jose Full-day Temporary

Description:

About the Role:Seeking an experienced STA/SDC engineer to own block and full-chip constraints, perform Static Timing Analysis (PrimeTime/Tempus), and collaborate with design and physical design teams for timing closure. Key Skills: Strong expertise in STA and SDC constraints (functional & test modes) Experience with PrimeTime, Tempus, and synthesis tools (Synopsys DC/DCG/FC) Verilog/SystemVerilog design knowledge CDC/glitch analysis (Spyglass CDC), Formal Verification (Formality, LEC) Scripting
Jun 26, 2025;   from: dice.com

Similar jobs

  • Della Infotech
  • San Jose
Minimum Qualifications Bachelor's Degree in Electrical or Computer Engineering with 7+ years of ASIC or related experience or Master's Degree in Electrical or Computer Engineering with 5+ years of ASIC or related experience Experience with block/full...
5 days ago

Description:

Position: STA Engineer (eInfochips Inc) Location: San Jose CA (Day-1 Onsite) Must have/Primary skills: Fullchip timing, SDC changes back to block level, Block/Full chip SDC development, Static Timing Analysis, Primetime/Tempus What You ...
25 days ago
  • Kutir Inc
  • San Jose

Description:

Position: STA Engineer Location: Onsite San Jose CA Duration: 6+ months In Person Interview is must Job Description: Must have/Primary skills: Fullchip timing, SDC changes back to block level, Block/Full chip SDC development, Static ...
25 days ago
  • Apolis
  • San Jose

Description:

Job Title: STA Engineer Location: San Jose ,CA Contract: 12+ MonthsWhat candidate will Be Doing: Technical: Being a member of design team who oversees fullchip STA/ SDCs and works with physical design and DFT teams to close fullchip ...
6 days ago