Description:
Position Title: CAD/EDA Silicon Design/Verification Infrastructure Engineer Location: Santa Clara, CA Term: Possible 3-Month Contract-to-Hire (CTH) Job Description: We are seeking a CAD/EDA Silicon Design/Verification Infrastructure Engineer with strong experience in SoC/IP design and verification infrastructure. The ideal candidate will have hands-on expertise in Python, SystemVerilog/UVM, and working in Linux-based environments. Minimum Qualifications: 5+ years of experience in EDA/CAD for SoC
Jul 17, 2025;
from:
dice.com