Description:
Title: SOC Design Verification Engineer Location: Santa Clara, CA Duration: 6+ Months Job Description: Basic Qualifications: Bachelor's degree in electrical / communications engineering or computer science 3 to 5+ years of experience in verification preferably in communication systems Proven track record where products have gone to volume production, preferably 1st pass Silicon. Strong written and verbal skills Strong problem solving and debugging skills Strong proficiency in SystemVerilog, U
Aug 13, 2025;
from:
dice.com