Description:
Design Verification Engineer SoC (Associate Level) We are building high-performance silicon for AI and compute-intensive workloads. We re looking for an Associate Design Verification Engineer to support SoC-level debug, triage, and verification focused on complex subsystems like PCIe and IOMMU. Scope: Perform SoC-level design verification with emphasis on debugging and triage. Work with PCIe and IOMMU/MMU, including VA to PA address translation. Analyze waveforms and root-cause functional and i
Aug 7, 2025;
from:
dice.com