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RTL Design Engineer - Specialized

Cynet Systems
Santa Clara Full-day Temporary

Description:

Job Description: Pay Range: $48.27hr - $62hr Skills: Modelling Analog-Mixed signal circuits in RTL, with experience in LDOs, BGs and EMC Ability to run and debug LECC for design. Run quality check tool such as Spyglass Lint and fix issues. Ability to provide direction on optimal/efficient hierarchical design of Analog-Mixed signal designs. Ability to run Co-Sim preferred. Ability to debug DV issues preferred. Experience: 7+ years' experience required. Education: Bachelor's (required) or Master's
Aug 25, 2025;   from: dice.com

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