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ASIC/RTL XXgn Engineer - Specialized

Cynet Systems
Santa Clara Full-day Temporary

Description:

Job Description: Pay Range: $66.20hr - $83hr Responsibilities: Develop/Maintain tests for functional verification. Build the directed and random verification tests, debug test failures to determine the root cause, work with RTL and firmware engineers to resolve design defects and correct any test issues. Work on functional & code coverage verification. Provide technical support to other teams. Preferred Experience: Experience with C/C++. Experience with Verilog, System Verilog, and modern verifi
Aug 21, 2025;   from: dice.com

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