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FPGA Design Verification Engineer- VLSI

Everest Global Solutions
Santa Clara Full-day Temporary

Description:

Client Job Title: FPGA Design Verification Engineer Job Title: Technical Lead II - VLSILocation: Santa Clara, CA . The Opportunity: We are seeking a highly motivated and skilled FPGA Verification Engineer to join our dynamic team, working on state of the art technologies. In this role, you will be responsible for the verification of complex FPGA designs, ensuring their functionality, performance, and reliability. You will work closely with design engineers to develop and execute verification pla
Dec 4, 2025;   from: dice.com

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